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Siemens Digital Industries Software Senior Application Engineer (AE) - Aprisa P&R in Hsinchu,

Job Family: Sales

Req ID: 414723

We are seeking a dynamic, professional and technical individual, who will be responsible for technical selling and support of Siemens EDA’s leading-edge Place and Route (P&R) solutions.

The P&R Applications Engineer will be responsible for working with the account managers to determine the sales execution strategy by identifying and qualifying engagements based on customers’ needs and business opportunities, defining evaluations and/or benchmark criteria and executing the relevant technical campaigns to meet established goals, enabling Siemens EDA P&R solutions’ adoption and deployment into customers’ production flows and providing best-in-class support to ensure customers’ success and broader use of Siemens EDA P&R solutions.

The job will be based in TBD with as much as 25% travel.

The responsibilities for the P&R AE role include, but is not limited to the following:

Job Responsibilities

Assisting Account Managers to determine sales execution strategy by identifying and qualifying the match-up between customer needs and Siemens EDA’s P&R solutions

Creating and executing winning evaluations and benchmarking strategies and driving the relevant technical engagements to success and business win

Supporting customers with deployment of P&R solutions and continued proliferation into broader design groups and user base

Providing technical support to customers in both pre-sales and post-sales situations including technical problem resolution and training

Communicating customers’ technical requirements to product marketingJob Qualifications

The successful candidate will possess the following combination of education and experience:

Requires bachelor’s degree in EE, CE or VLSI

5+ years of industry experience in EDA or IC design space

Expertise with Cadence Innovus, Synopsys IC Compiler I/II, Avatar Aprisa and/or Siemens EDA Nitro-SoC

Advanced FinFET process focused RTL to tape-out design flow knowledge

Hands-on experience leading or working on IC design tape-out, P&R evaluations or benchmarking engagements

Expertise in netlist to tape-out flow and meeting power-performance-area (PPA) and time-to-results (TTR) goals

In-depth understanding of core P&R stages, root cause analysis and debugging (floorplanning, placement, clock tree synthesis, routing, signal and power integrity and static timing analysis)

Must enjoy working with customers and cross-functional teams (sales, product management and R&D, marketing)

Expert level TCL scripting and understanding of Verilog, UPF data formats

Customer relationships and expectations management

Technical campaigns and priorities management

Strong communication skills

Proactive self-starter with a focus on results

Motivated team player/leader

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